使用莱迪思的FPGA加速设计周期

Fast-Track Design Cycles Using Lattice’s FPGAsHussein OsmanMarketing DirectorLattice SemiconductorEmbedded Vision TrendsSupport multiple sensors anddisplaysMove to higher resolutions and faster frame ratesConnect MIPI and legacy componentsEnable AI processing at low powerThese trends require hardware with:Low PowerSmall Form FactorHigh PerformanceHigh ReliabilityEase of Use2Lattice Semiconductor (NASDAQ: LSCC)FPGA adaptable architecture is required to accelerate compute efficientlyEdge devices typically run on battery and are thermally challenged requiring low power profileGPUs used as accelerators best when executing the same instruction in parallel, also power hungryRapidly changing deep learning AI algorithmsHeterogenous compute is required with HW accelerators assisting CPUsGetting to market quicklyCompute requirement doubling every 3 month, 7x faster than Moore’s lawSoC based heterogeneous compute is rigid, the HW accelerators are not programableSpinning new versions of ASICs